Tim & others, I understand that your implementation uses tagged pointers to avoid ABA problems. An issue with tagged pointers is that naively they will be 2*sizeof(T*) and systems may not have atomic operations that operate on things of that size. Looking at the code, I see that you also have a "compressed" tagged pointer that is enabled for some architectures. Having found this code, I now vaguely recall some previous mailing list discussions about this. Sometimes it may be possible to claim that users (& reviewers?) of a library do not need to know about details of this sort because the library "just works", and that if they are curious they can read the source. I don't think this is one of those cases. The documentation should explain in outline how this works, and provide rationale for why it is how it is. IIRC, ARM has 64-bit atomics only from architecture version 6k onwards, and my Boost.Atomic ARM code doesn't use them. This could be fixed. Regards, Phil.