According to a message I received, the ARM CPU uses little-endian 32-bit integers, and 64-bit integers are created by combining two little-endian integers in big-endian order, which by my calculations gives us a byte order of DCBAHGFE. I actually defined PDP-endian to do this byte ordering for 64-bit words simply because I couldn't forbid it due to dynamic byte ordering concerns. This page: http://infocenter.arm.com/help/topic/com.arm.doc.ddi0278b/Cegbbbab.html suggests that the ARM can actually switch between big-endian, little-endian, and middle-endian! However, this brings up a concern of the best way to name things. The PDP-11 didn't have 64-bit integers (unless there's some extension somewhere that I'm not aware of), so calling this PDP-endian is really a misnomer for 64-bit integers. The ARM processor is either big-endian or little-endian for 32-bit access, so it can't even be generalized to some middle-endian version, I would need something like PDP-endian and ARM-endian. I'm assuming that all multi-endian (the term bi-endian doesn't apply to the ARM, which appears to have three endian modes) processors require dynamic endian determination.