Jerry Napoli:
Hi,
I'm trying to compile using boost 1_36_0 for ARMv6 Thumb for iPhone development. The compiler used is gcc 4.0.x supplied with the iphone sdk.
I run into issues with the inline assembly inside boost/detail/spinlock_gcc_arm.hpp. It generates a SWP instruction which (AFAIK) is not supported in thumb mode. The gnu arm assembler gives me a 'bad instruction ...' error. I'm able to work around it by modifying spinlock.hpp to include spinlock_sp.hpp instead.
I assume you mean spinlock_nt.hpp? Unless someone comes up with a better solution, we probably need to replace #if defined(__GNUC__) && defined( __arm__ ) # include <boost/detail/spinlock_gcc_arm.hpp> #elif defined(__GNUC__) && ( __GNUC__ * 100 + __GNUC_MINOR__ >= 401 ) # include <boost/detail/spinlock_sync.hpp> with #if defined(__GNUC__) && defined( __arm__ ) && !defined( __thumb__ ) # include <boost/detail/spinlock_gcc_arm.hpp> #elif defined(__GNUC__) && ( __GNUC__ * 100 + __GNUC_MINOR__ >= 401 ) && !defined( __arm__ ) # include <boost/detail/spinlock_sync.hpp> Does this change help?