
on 11.09.2009 at 3:19 Cory Nelson wrote :
I'm curious, have you actually tried to look at the generated instructions? of course
Because on a 686+ this should compile this into two non-branching instructions for min(): cmp a, b cmova a, b And the same thing but with cmovb for max(). neither icc11 nor msvc80 generate such instructions msvc generates a conditional jump and icc generates code "without branches but with the sbb asm instruction" (c) Joel Falcou
You solution should generate at least 5 instructions. yep
i got an interesting result msvc happily optimizes a lut implementation but generates branch for traditional one (?:) however icc eliminates branch for ?: but generates slow code for lut in the end we have too competitors: msvc_lut and icc_?: and the record holds msvc which is some percent faster than icc code and also branches were faster than lut on amd athlon and athlon xp+ so i guess such implementation is not a good idea in general -- Pavel